1. Technical Field
This disclosure relates to semiconductor fabrication and more particularly, to an extended trench for decreasing interactions between a barrier layer and a high dielectric constant material used in stack capacitor fabrication for semiconductor memories.
2. Description of the Related Art
Semiconductor memory cells include capacitors accessed by transistors to store data. Data is stored by as a high or low bit depending on the state of the capacitor. The capacitor's charge or lack of charge indicates a high or low when accessed to read data, and the capacitor is charged or discharged to write data thereto.
Stacked capacitors are among the types of capacitors used in semiconductor memories. Stacked capacitors are typically located on top of the transistor used to access a storage node of the capacitor as opposed to trench capacitors which are buried in the substrate of the device.
In semiconductor memories, such as dynamic random access memories (DRAM), high dielectric constant capacitor formation processes include deposition of highly dielectric materials. In one type of high dielectric constant capacitors, a layer of high dielectric constant materials, such as barium strontium titanium oxide (BSTO), is deposited in an oxidizing atmosphere.
Referring to FIG. 1, a structure 2 with stacked capacitors is shown. Stacked capacitor 3 includes two electrodes a top electrode or storage node 4, usually platinum (Pt) and a bottom electrode 12 separated by a dielectric layer 18. An access transistor 5 includes a gate 6 which when activated electrically couples a bitline 7 through a bitline contact 8 to a plug 14. Plug 14 connects to electrode 12 through a diffusion barrier 16 which stores charge in electrode 12.
Electrode 12 is separated from plug 14 by diffusion barrier 16. Plug 14 is preferably polycrystalline silicon (polysilicon or poly). During processing, dielectric layer 18 is deposited on electrode 12. Dielectric layer 18 is typically a material with a high dielectric constant, for example BSTO. Diffusion barrier 16 is employed to prevent the formation of an oxide layer between electrode 12 and diffusion barrier 16.
Material properties between dielectric layer 18 and barrier 16 are degraded if materials of the respective layers interact. Further, dielectric layer 18 (BSTO) reacts with diffusion barrier 16 if the compounds in each layer come into contact. Given the proximity of the two materials in the conventional design shown in FIG. 1, there is an increased likelihood for this reaction to occur and degrade the properties of stacked capacitor 3.
Therefore, a need exists for improving capacitance of stacked capacitors by sealing off a barrier to prevent degradation of a high dielectric constant layer and the barrier layer as a result of processing and diffusion. A further need exists for a method of increasing the capacitance of the stacked capacitors by increasing surface area of a bottom electrode.